1. Field
Exemplary embodiments relate to a non-volatile memory device which has a resistance which is variable depending upon a current or voltage and which need not be refreshed since stored data is retained even when power is cut off, and more particularly, to a method of forming a multi-level cell in which a bottom electrode contact (BEC) or a phase-change material (GST) has three or more parallel structures, so that two or more bits of data are stored in a memory cell.
2. Description of Related Art
A semiconductor memory device requires high operating speed and drivability at low power and a large number of memory cells per unit area, i.e., high integration density. Much research devoted to such devices has been actively progressing, and various types of memory devices have been developed.
In general, a semiconductor memory device includes many memory cells connected to each other by circuitry. In the case of a dynamic random access memory (DRAM), which is a representative memory device, a unit memory cell generally includes a switch and a capacitor. The DRAM exhibits high integration density and high operating speed. However, when power is cut off, all stored data is lost.
A non-volatile memory device, characterized in that it maintains stored data even when power is cut off, exhibits a drastically evolved technique to meet increased demand for devices such as personal digital assistants (PDAs). A flash memory, which is a representative non-volatile memory device, takes advantage of a low-cost silicon process to form most of the current non-volatile memory market. However, the flash memory device has certain drawbacks, such as requiring a relatively high voltage for data storage and limiting the number of repeated data storage. Therefore, research and development on a next generation memory device to overcome such drawbacks are needed.